Verification Design Engineer
Company: VirtualVocations
Location: Topeka
Posted on: February 3, 2025
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Job Description:
A company is looking for a SOC Verification Engineer.
Key Responsibilities
Develop and execute test plans for SOC verification using System
Verilog and C
Perform debugging and failure analysis on processor-based SOCs with
AXI/AHB interfaces
Utilize EDA tools for simulation and test development, ensuring
efficient connectivity testing
Required Qualifications
6-12+ months of relevant experience in SOC verification
Proficiency in System Verilog and C programming
Experience with UVM is a plus, but not mandatory
Knowledge of processor-based SOCs and standard debugging tools
Experience with Jasper Gold for connectivity testing is
advantageous
Keywords: VirtualVocations, Kansas City , Verification Design Engineer, Engineering , Topeka, Kansas
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